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Voltage Regulators
AN8029
Self-excited RCC pseudo-resonance type AC-DC switching power supply control IC
s Overview
The AN8029 is an IC developed for controlling the self-excited switching power supply employing the RCC pseudo-resonance type control method. It is compact, equipped only with the necessary minimum functions. The maximum on-period and the minimum off-period can be set separately by using the external capacitor and resistor respectively. It is suitable for the power supply of AV equipment.
2.40.25 6.00.3 3.30.25
Unit: mm
8
0.50.1
7
23.30.3
6 5 4
1.50.25 1.50.25 1.40.3
2 1
0.3 +0.1 -0.05
s Features
* Operating supply voltage range: 3.00.3 Stop voltage (8.6 V typical) to 34 V SIP009-P-0000C * Output block employs the totem pole system. * Power MOSFET can be directly driven. (output peak current: 1 A maximum) * Small pre-start operating current (95 A typical) allows using a small size start resistor. * Built-in pulse-by-pulse overcurrent protection function * Incorporating the protection circuit against malfunction at low voltage (start/stop: 14.9 V/8.6 V) * Built-in overvoltage protection function (externally resettable) * Built-in timer latch function * Equipped with frequency (VF) control function. * 9-pin single inline package expands the freedom of board design
s Applications
* Televisions, facsimiles, printers, scanners, video equipment
VCC
s Block Diagram
Signal U.V.L.O. 8.6 1.5 VV TIM/OVP FB 8 9 TIM VREF (7.1 V)
7
Current source Switch diode IFB QQ 0.1 V RS latch R S 0.32 V 0.7 V
IN IN
6 5
VOUT GND
TDL
1 Low-side High-side clamp clamp 0V 2.8 V CLM 4 CLM
2
TOFF
TON
3
30
3
2.54
9
1
AN8029
s Pin Descriptions
Pin No. 1 2 3 4 5 6 7 8 9 Symbol TDL TOFF TON CLM GND VOUT VCC TIM/OVP FB Description Transformer reset detection Pin for connecting C and R to set minimum off-period Pin for connecting C to set minimum on-period Input pin for overcurrent protection detection Grounding pin Output pin Power supply voltage pin Pin for use both overvoltage protection circuit and timer latch Photocoupler connection pin for error voltage feedback
Voltage Regulators
s Absolute Maximum Ratings
Parameter Supply voltage Peak output current Power dissipation Operating ambient temperature Storage temperature
* *
Symbol VCC I6PEAK PD Topr Tstg
Rating 35 1 874 -30 to +85 -55 to +150
Unit V A mW C C
Note) *: Expect for the operating ambient temperature and storage temperature, all ratings are for Ta = 25C.
s Recommended Operating Range
Parameter Supply voltage Symbol VCC Range From stop voltage to 34 Unit V
s Electrical Characteristics at VCC = 18 V, Ta = 25C
Parameter U.V.L.O. start supply voltage U.V.L.O. operation stop supply voltage U.V.L.O. start to stop supply voltage OVP operation threshold voltage OVP release voltage OVP operating circuit current 1 OVP operating circuit current 2 TDL threshold voltage TDL upper limit clamp voltage TDL lower limit clamp voltage CLM threshold voltage Symbol V7START V7STOP V7 V8OVP V7OVP I7OVP1 I7OVP2 V1TDL V1TDL/H V1TDL/L V4CLM ITDL = 3mA ITDL = -3mA VCC = 9.1 V, VOVP = 8.5 V VCC = 20 V, VOVP = 8.5 V Conditions Min 13.4 7.7 5.7 6.1 7.4 0.56 5.9 0.22 2 - 0.3 180 Typ 14.9 8.6 6.3 7.3 8.2 0.79 7.7 0.32 2.8 0 200 Max 16.4 9.5 6.9 8.5 9 1.02 9.5 0.42 3.6 0.3 220 Unit V V V V V mA mA V V V mV
2
Voltage Regulators
s Electrical Characteristics at VCC = 18 V, Ta = 25C (continued)
Parameter TON maximum on-period current TON upper limit voltage TON lower limit voltage TOFF upper limit voltage TOFF lower limit voltage Output oscillation frequency Output current feedback current gain Pre-start low-level output voltage Low-level output voltage 1 Low-level output voltage 2 High-level output voltage 1 High-level output voltage 2 Pre-start circuit current Circuit current 1 Symbol I3TON Conditions FB terminal = open TON terminal = GND Min -135 0.55 - 0.1 0.7 - 0.1 CON = 2 200 pF, ROFF = 1.5 k COFF = 1 000 pF IFB = -1 mA VCC = 10 V, IOUT = 10 mA IOUT = 10 mA IOUT = 100 mA IOUT = -10 mA IOUT = -100 mA VCC = 12V VCC = 18 V TON terminal = GND FB terminal = open VCC = 34 V TON terminal = GND FB terminal = open VTDL = 0.5 V 55 5.05 15.7 15.5 55 8.55 Typ -110 0.7 0.05 0.9 0.05 65 6.8 1 0.9 1.1 16.5 16.3 95 11.5
AN8029
Max -85 0.85 0.2 1.1 0.2 75 8.55 1.25 2 2.2 135 14.3
Unit A V V V V kHz V V V V V A mA
V3TON/H FB terminal = open V3TON/L FB terminal = open V2TOFF/H V2TOFF/L fOSC GIFB V6STB/L V6L(1) V6L(2) V6H(1) V6H(2) I7STB I7OPR(1)
Circuit current 2
I7OPR(2)
9.6
12.5
15.4
mA
TDL flowing-out current
I1TDL
-5
0
A
s Terminal Equivalent Circuits
Pin No. 1
VREF
Equivalent circuit
Description TDL: Transformer reset detection terminal. When the transformer reset is detected and low is inputted into the terminal, the output of the IC (VOUT) becomes high. However, low-level signal under the minimum off-period determined by the TOFF is ignored. TOFF: Terminal for connecting the resistor and capacitor for determining the minimum off-period (low) of the IC output (VOUT). An equation for approximate calculation of the minimum off-period (TOFF) is as follows: TOFF = 2.2 x C x R C: External capacitance R: External resistance
I/O I
1 High-side Low-side clamp clamp
2
VREF
Comp.
0.1 V 2
3
AN8029
s Terminal Equivalent Circuits (continued)
Pin No. 3 Equivalent circuit Description
Voltage Regulators
I/O
VCC VREF
Comp.
0.7 V 3
FB
TON: Terminal for connecting the capacitor for determining the maximum on-period (high) of the IC output (VOUT). An equation for approximate calculation of the maximum on-period (TON) is as follows: TON = 6 500 x C C: External capacitance CLM: Input terminal for detection of the pulse-by-pulse overcurrent protection. Normally, it is recommended that a filter be attached externally.
4
VREF
I
Comp.
4 (+) 5 GND: Grounding terminal VOUT: Output terminal for directly driving the power MOSFET. It uses the totem pole type output. The maximum rating of the output current : Peak: 1 A DC: 150 mA
5
6
VCC
O
6
7
7
VCC: Terminal for applying power supply voltage. It monitors the supply voltage and has the operation threshold of start/stop/OVP reset.
4
Voltage Regulators
s Terminal Equivalent Circuits (continued)
Pin No. 8 Equivalent circuit Description
AN8029
I/O I
VCC 7.3 V
Comp.
5 A 8
TIM/OVP: Terminal for use both OVP (overvoltage protection circuit) and timer latch. [OVP] When overvoltage signal of the power supply is detected and high is inputted to the terminal, it turns off the internal circuit. At the same time, it holds that condition (latch). To reset the OVP latch, the VCC should be decreased to a voltage lower than the release voltage. [Timer latch] It detects the output voltage fall due to the overcurrent condition of the power supply output through the current level inputted to IFB. When the IIFB decreases under the current of certain value, the charge current flows in the capacitor which is connected to this terminal. Then, when the capacitor is charged up to the threshold voltage of the OVP, the OVP works so that the IC could keep the operation stop condition. FB: Terminal for connecting the photocoupler for error voltage feedback of the power supply output. It is possible to cancel about 180 mA of the dark current of photocoupler.
9
VCC
I
TON
9
s Application Notes
[1] Operation descriptions 1. Start/stop circuit block * Start mechanism When AC voltage is applied and the supply voltage reaches the start voltage through the current from start resistance, the IC starts operation. Then the power MOSFET driving starts. Thereby, bias is generated in the transformer and the supply voltage is given from the bias coil to the IC. (point a in figure 1) During the period from the time when the start voltage is reached and the voltage is generated in the bias coil to the time when the IC is provided with a sufficient supply voltage, the supply voltage of the IC is supplied by the capacitor (C8) connected to VCC .
After AC rectification Start resistance
R1 VCC VOUT GND C8
Before start Start voltage Stop voltage
a
Start Voltage supplied from bias coil Start condition
b Figure 1
c Start failure
5
AN8029
s Application Notes (continued)
[1] Operation descriptions (continued)
Voltage Regulators
1. Start/stop circuit block (continued) * Start mechanism (continued) Since the supply voltage continuously decreases during the above period (area b in figure 1), the power supply is not able to start (state c in figure 1), if the stop voltage of the IC is reached before the sufficient supply voltage is supplied from the bias coil. * Function The start/stop circuit block is provided with the function to monitor the VCC voltage, and to start the operation of IC when VCC voltage reaches the start voltage (14.9 V typical), and to stop when it decreases under the stop voltage (8.6 V typical). A large voltage difference is set between start and stop (6.3 V typical) so that it is easier to select the start resistor and the capacitor to be connected to VCC.
Note) To start up the IC operation, the startup current which is a pre-start current plus a circuit drive current is necessary. Set the resistance value so as to supply a startup current of 350 A.
2. Oscillation circuit The oscillation circuit generates the pulse signal for turning on/off the power MOSFET by using charge/ discharge of the C2, R2 and C3 connected to TOFF (pin 2), TON (pin 3) respectively. The concept of constant voltage control at the time of making up the switching power supply is fixing the offperiod of the power MOSFET and achieving the control by changing the on-period. This on-period control is performed by directly changing the output pulse width of the oscillation circuit. During the on-period of the power MOSFET, the C2 is charged to the constant voltage (approximately 0.9 V). On the other hand, the C3 is charged from almost 0 V by the charge current from the TON terminal. When the voltage across the both ends of the C3 reaches approximately 0.7 V (Ta = 75C), the oscillation circuit output is reversed and the power MOSFET is turned off. At the same time, the C3 is rapidly discharged by the discharge circuit inside the IC and its voltage across the both ends becomes almost 0 V. The charge current from the TON terminal is changed by the feedback signal to the FB terminal (pin 9). (Described later.)
On-period Off-period 0.9 V 200 Voltage across both ends of C2 Voltage across both ends of C3 IC output 0V Figure 2. Oscillation circuit operation
An equation for approximate calculation of the maximum on-period TON(max) of the power MOSFET is as follows: TON(max) = 6 500 x C3 When the power MOSFET is off, the TOFF terminal becomes a high impedance state and the C2 starts discharging by the R2. When the voltage across the both ends of C2 decreases to approximately 0.1 V, the oscillation circuit output is reversed again to turn on the power MOSFET. At the same time, the C2 is rapidly charged to approximately 0.9 V. An equation for approximate calculation of the minimum off-period TOFF(min) is as follows: TOFF(min) = 2.2 x C2 x R2 However, when the voltage-time fed back to the TDL terminal (pin 1) is longer than the TOFF period determined by the C2 and R2, the off-period in the pseudo-resonance circuit operation described below is determined by the former. By repeating the above operation, the power MOSFET is turned on and off continuously. Figure 2 shows the oscillation waveform at the time when the TDL terminal is pulled down to the GND. 6
0.1 V 0.7 V 0V
TOFF
TON
C3
C2
R2
Voltage Regulators
s Application Notes (continued)
[1] Operation descriptions (continued)
AN8029
3. Power supply output control system (FB : Feedback) The constant voltage control of the power supply output is achieved by fixing the off-period of the power MOSFET and changing the on-period. The control of on-period is performed by changing the charge current from the TON terminal to the C3 through the following process: The photocoupler connected to the FB terminal (pin 9) absorbs, from the FB terminal, the feedback current corresponding to the output signal of the output voltage detection circuit provided in the secondary side output. A current approximately 7 times of the current flowing out of the FB terminal flows out of the TON terminal as the charge current for the C3. (Refer to figure 3.)
1:7 200 PC
Secondary side power supply output
PC
C3
C2
TOFF
TON
FB
AN1431T/M
R2
Primary side
Secondary side
Figure 3. Power supply output control system
The higher the AC input voltage of the current becomes, or the smaller the load current becomes, the larger the current flowing out of the FB terminal becomes. When the current flowing out of the FB terminal becomes larger, the charging to C3 becomes faster and the on-period becomes shorter. In addition, the system has cancellation capability of about 180 A for the dark current of the photocoupler. (Refer to figure 4.)
ITON (mA)
-10 -8 -6 -4 -2
Dark current - 0.2 - 0.4 - 0.6 - 0.8 -1.0
0
IFB (mA)
Figure 4. Feedback current versus charge current characteristics
4. Pseudo-resonance operation (Power MOSFET turn-on delay circuit) For the AN8029, the pseudo-resonance operation becomes possible by making connection as shown in figure 5. The C7 is a resonance capacitor, and the R9 and C9 constitute the delay circuit for regulating the turn-on of power MOSFET. When the power MOSFET is turned off, the voltage generated in the drive coil is inputted to the TDL (time delay) terminal (pin 1) through the R9 and C9. While high-level signal (higher than threshold voltage 0.32 V) is inputted, the power MOSFET remains off. Also, the TDL terminal has the high/low side clamping capability. The upper limit of clamping voltage is 2.8 V typical (when sink current: 3 mA) and the lower limit of clamping voltage is approximately 0 V (typical) (when source current: 3 mA). The off-period of the power MOSFET is determined by the following periods whichever longer: The time until the TDL terminal input voltage becomes a voltage lower than the threshold voltage as the transformer started the resonance operation and the drive coil voltage drops, and the minimum off-period TOFF(min) of the internal oscillation circuit. (Refer to description on the oscillation circuit.) 7
AN8029
s Application Notes (continued)
[1] Operation descriptions (continued)
Voltage Regulators
4. Pseudo-resonance operation (Power MOSFET turn-on delay circuit) (continued) As for the turn-on of power MOSFET, determine the delay time by selecting the constant of the R9 and C9 so that it turns on at 1/2 cycle of the resonance frequency. In a simplified method, select so that the voltage waveform turns on at zero voltage. (Refer to figure 6) The approximate value of resonance frequency can be obtained by the following equations: fSYNC = 1 2 L * C [Hz] C: resonance capacitance L: inductance of transformer's primary coil
Therefore, the turn-on delay time tpd(ON) for turning on the power MOSFET at 1/2 cycle of resonance frequency is as follows: tpd(ON) = L * C [s] 5. Notes on R9 and C9 selection If too low resistance is selected for the R9, the current flowing into the TDL terminal after the start of power supply exceeds the maximum rating value and there is a possibility of causing malfunction (destruction in the worst case). It is recommended that about 8 k to 10 k be selected for the R9 though it depends on the supply voltage from the bias coil. Therefore, adjust tpd(ON) with C9 after converting from the inductance of transformer being used and the resonance capacitance. tpd
VDS VIN
After AC rectification
R1
VP 0V
VP VIN VTDL VTDL 2.8 V typ.
VCC C8 R9 TDL SBD C9 0.32 V 0V ID C7 0V Figure 6
VOUT SBD ID R7
Figure 5
6. Overcurrent protection circuit The overcurrent of the power supply output is proportional to the value of current flowing in the main switch in the primary side (the power MOSFET). Taking advantage of the above fact, the overcurrent of the power supply output is restricted by regulating the upper limit of the pulse current flowing in the main switch to protects the parts easily damaged by the overcurrent. The current flowing in the main switch is detected by monitoring the voltage of both ends of the low resistor which is connected between the source of power MOSFET and the power supply GND. When the power MOSFET is turned on and the threshold voltage of CLM (Current Limit) is detected, the circuit turns off the output and turns off the power MOSFET to control so as not to allow further current flow. The threshold voltage of CLM is approximately 0.2 V (typical) under Ta = 25C with respect to GND. This control is repeated for each cycle. Once the overcurrent is detected, the off condition is kept during that cycle and it can not be turned on until the next cycle. The overcurrent detection method described in the above is called "pulse-by-pulse overcurrent detection". 8
Voltage Regulators
s Application Notes (continued)
[1] Operation descriptions (continued) 6. Overcurrent protection circuit (continued) The R6 and C6 in figure 7 construct the filter circuit for removing the noise generated by the parasitic capacitance equivalently accompanied when turning on the power MOSFET. For overcurrent detection resistance R7, the carbon resistor should be used but not the wire winding resistor, because the high-frequency current flows in it.
AN8029
CLM
R8 C6
R6 R7
GND
Figure 7 * Notes on the detection level precision This overcurrent detection level reflects on the operating current level of the power supply overcurrent protection. Therefore, if this detection level fluctuates with temperature or variability, the operating current level of the overcurrent protection of power supply itself also fluctuates. Since such level fluctuation means the necessity for an increase in the withstanding capability of used parts and in the worst case it means the cause of destruction, the accuracy of detection level is increased as much as possible for the AN8029 (approximately 4%).
7. Overvoltage protection circuit (OVP) OVP is an abbreviation of over voltage protection. It refers to a self-diagnosis function, which stops the power supply to protect the load when the power supply output generates abnormal voltage higher than the normal output voltage due to failure of the control system or an abnormal voltage applied from the outside. (Refer to figure 8.) After AC rectification Start resistor R1 VCC Power supply output FRD Load It detects abnormal voltage applied from the outside to the power supply output (the voltage which is higher than voltage of the power supply output and may damage the load) by the primary side of the bias coil and operates the OVP. Figure 8 Basically, it is set to monitor the voltage of supply voltage VCC terminal of the IC. Normally, the VCC voltage is supplied from the transformer drive coil. Since this voltage is proportional to the secondary side output voltage, it still operates even when the secondary side output is in overvoltage. 1) When the voltage input to the OVP terminal exceeds the threshold voltage (7.3 V typical) as the result of power supply output abnormality, the protective circuit shuts down the internal reference voltage of the IC to stop all of the controls and keeps this stop condition. 2) The OVP reset is done by decreasing the supply voltage (VCC < 8.2 V typical: OVP release supply voltage). (1) When the supply voltage becomes lower than the stop voltage, (2) When the supply voltage becomes lower than the OVP release voltage, The discharge circuit is incorporated so that the electric charge which is charged in the capacitor connected to the OVP terminal can be discharged momentarily for the next re-start. secondary side output voltage under normal operation VOUT Vth(OUT) = x V7 VCC terminal voltage under normal operation V7 = Vth(OVP) + VZ Vth(OUT) : Secondary side output overvoltage threshold value Vth(OVP) : OVP operation threshold value VZ : Zener voltage (externally attached to OVP terminal) 9 Abnormal voltage applied from outside
TIM/OVP VOUT GND
AN8029
s Application Notes (continued)
[1] Operation descriptions (continued)
Voltage Regulators
7. Overvoltage protection circuit (OVP) (continued) * Operating supply current characteristics While the OVP is operating, the decrease of the supply current causes the rise of the supply voltage VCC , and in the worst case, the guaranteed breakdown voltage of the IC (35 V) can be exceeded. In order to prevent the rise of supply voltage, the IC is provided with such characteristics as that the supply current rises in the constant resistance mode. This characteristics ensure that the OVP can not be released unless the AC input is cut, if the supply voltage VCC under OVP operating has been stabilized over the OVP release supply voltage (which depends on start resistor selection). (Refer to figure 9.) The current supply from the start resistor continues as long as the voltage of the power After supply input (AC) is given. AC rectification
Start resistor R1
VCC VOUT GND
After OVP starts operation, since the output is stopped, this bias coil does not supply current.
* Select the resistance value so that the
following relationship can be kept by current supply from the start resistor: VCC > VCC-OVP At VCC-OVP (voltage under which OVP is released) as the boundary, the operating current is temporarily increased. This prevents VCC from exceeding the breakdown voltage due to the current supplied from the above start resistor.
ICC
VCC- OVP
VCC Figure 9
8. Timer latch When the short-circuit or overload of the power supply output continues for a certain period, the pulse-by-pulse overcurrent protection is not sufficient for protection of the transformer, fast recovery diode (FRD), Schottky diode in the secondary side, and the power MOSFET. For this reason, the timer latch function is employed, which stops the power supply by hitting the OVP when the overcurrent condition continues for a certain period. The short-circuit or overload of the power supply output is monitored as the decrease of the power supply output (at this time the pulse-by-pulse overcurrent protector is in the operating condition). The decrease of the power supply output is detected as the decrease of current amount at the current feedback terminal of IFB control. When the decrease amount of this current exceeds a certain value, the comparator inside the IC reverses, and the constant current flows to the TIM/OVP terminal. The external capacitor is connected to the TIM/OVP terminal. Electric charges are accumulated in this capacitor, rising the OVP terminal voltage. When the OVP operating threshold voltage (7.3 V typical) is reached, the OVP starts operation to stop the IC, and keeps this stop condition. (Refer to figure 10.) * Timer period The period from the time when an error of the power supply output is detected to the time when the OVP starts operation (hereinafter referred to as "timer period") should be longer than the rise time of the power supply. Since at operation start the IC is in the same condition as the overload or output short-circuit condition, if the timer period is shorter, the power supply works latch and can not start. Therefore, the IC is designed so that the timer period can be set arbitrarily to by the value of the external capacitor connected to the TIM/OVP terminal. However, particular care should be taken, because too large value of this capacitor may cause the breakdown of the power supply. 10
Voltage Regulators
s Application Notes (continued)
[1] Operation descriptions (continued) 8. Timer latch (continued)
VO Power supply output voltage 0 IDS Power MOSFET current 0 VOVP TIM/OVP terminal voltage 0 Figure 10. Timer latch basic operation
AN8029
Power supply stop
Time Power supply stop
Time
Power supply stop OVP VTH = 7.3 V (typ.) Time
9. Output block In order to drive the power MOSFET which is a capacitive load at high speed, this IC is adopting the totem pole (push-pull) type output circuit which performs the sink and source of the current with the NPN transistor as shown in figure 10. The maximum sink/source current is 0.1 A (DC) and the current at peak is 1.0 A (Peak). The circuit is provided with the sink capability even if the supply voltage VCC is under the stop voltage so that it turns off the power MOSFET without fail. The peak current capability is mainly required and a particularly too large current is not required constantly. Because the power MOSFET becomes a capacitive load for the output, a large peak current is required for driving it at a high speed. However, after the charge and discharge, a particularly large current is not required to keep such condition. In the case of this IC, the peak current capability of 1 A is ensured by taking a capacitance value of the power MOSFET used into account. The parasitic LC of the power MOSFET may produce ringing to decrease the output pin under the GND potential. When the voltage decrease of the output pin becomes larger than the voltage drop of diode and its voltage becomes negative, the Schottky barrier parasitic diode consisting of the substrate and diode collector of the output NPN turns on. This phenomenon can cause the malfunction of device. In such a case, the Schottky barrier diode should be connected between the output and GND. Figure 11
11
AN8029
s Application Notes (continued)
[2] Design reference data
Voltage Regulators
* How to start the soft start function by external parts The power supply rises under overload condition due to the capacitor connected to the power supply output. In this condition, since the voltage of the power supply output is low, the normal constant voltage control attempts to rise the power supply output at the maximum duty. The control uses the pulse-by-pulse overcurrent protection (CLM) , attempting to limit the current. However, the pulse can not be brought down to zero due to delay of filter, etc. As a result, a large current flows into the main switch (the power MOSFET) or the diode in the secondary side, and in the worst case these parts are damaged. For this reason, the soft start function is used to suppress the rush current at start of the power supply. As shown in figure 12, the R3 and C4 are connected between the FB terminal (pin 9) and the GND terminal (pin 5) to use the soft start function. When the supply voltage of the IC reaches the start voltage and the start circuit begins operation, the open bias is outputted to the FB terminal. By this voltage, the charge current flows in the C4 to become flowing-out current of the FB terminal (IFB) and After AC rectification output control begins under the condition in which TON Start resistor R1 period is short. The IFB decreases with elapse of time, since it changes proportionally to the charge current of the VCC C4. The CLM circuit operates, depending on the sum of C8 the R7 end-to-end voltage by the current which flows in FB the power MOSFET at power-on and the R6 end-to-end R3 voltage by the charge current of the C4. Therefore, since the current which flows in the power C4 MOSFET at power-on gradually increases, the rush current can be suppressed. VOUT
CLM GND R8 C6 R6 R7
Figure 12
12
D2 R1 68 k D1 C10 C8 82 F C7 2 200 pF R12 AN1431T/M FRD PC1 R10 R11
Voltage Regulators
s Application Circuit Example
C1 560 F
AC
VCC 7
R9 10 k OVP 6 Out TDL
Drive
TIM/ OVP 8 U.V.L.O. R5 22 4 CLM R8 1.5 k R6 680
VREF
TDL 1 FB CLM
High-clamp
VF control
Low-clamp
C9 470 pF
9 FB
3 TON
5 GND
2 TOFF
SBD PCI R3 15 k C4 C3 0.033 F 1 800 pF
C5 1 F
C6 2 200 pF
R7 0.11
R2 1.5 k C2 1 000 pF
AN8029
13

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